An Ensemble of Hyperdimensional Classifiers: Hardware-Friendly Short-Latency Seizure Detection with Automatic iEEG Electrode Selection.

Burrello, Alessio; Benatti, Simone; Schindler, Kaspar; Benini, Luca; Rahimi, Abbas (2021). An Ensemble of Hyperdimensional Classifiers: Hardware-Friendly Short-Latency Seizure Detection with Automatic iEEG Electrode Selection. IEEE journal of biomedical and health informatics, 25(4), pp. 935-946. Institute of Electrical and Electronics Engineers 10.1109/JBHI.2020.3022211

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We propose an intracranial electroencephalography (iEEG) based algorithm for detecting epileptic seizures with short latency, and with identifying the most relevant electrodes. Our algorithm first extracts three features, namely mean amplitude, line length, and local binary patterns that are fed to an ensemble of classifiers using hyperdimensional (HD) computing. These features are embedded into an HD space where well-defined vector-space operations are used to construct prototype vectors representing ictal (during seizures) and interictal (between seizures) brain states. Prototype vectors can be computed at different spatial scales ranging from a single electrode up to many electrodes covering different brain regions. This flexibility allows our algorithm to identify the iEEG electrodes that discriminate best between ictal and interictal brain states. We assess our algorithm on the SWEC-ETHZ iEEG dataset that includes 99 short-time iEEG seizures recorded with 36 to 100 electrodes from 16 drug-resistant epilepsy patients. Using k-fold cross-validation and all electrodes, our algorithm surpasses state-of-the-art algorithms yielding significantly shorter latency (8.81 s vs. 9.94 s) in seizure onset detection, and higher sensitivity (96.38 % vs. 92.72 %) and accuracy (96.85 % vs. 95.43 %). We can further reduce the latency of our algorithm to 3.74 s by allowing a slightly higher percentage of false alarms (2 % specificity loss). Using only the top 10 % of the electrodes ranked by our algorithm, we still maintain superior latency, sensitivity, and specificity compared to the other algorithms with all the electrodes. We finally demonstrate the suitability of our algorithm to deployment on low-cost embedded hardware platforms, thanks to its robustness to noise/artifacts affecting the signal, its low computational complexity, and the small memory-footprint on a RISC-V microcontroller.

Item Type:

Journal Article (Original Article)


04 Faculty of Medicine > Department of Head Organs and Neurology (DKNS) > Clinic of Neurology

UniBE Contributor:

Schindler, Kaspar Anton


600 Technology > 610 Medicine & health




Institute of Electrical and Electronics Engineers




Chantal Kottler

Date Deposited:

10 Nov 2020 09:58

Last Modified:

08 Apr 2021 01:31

Publisher DOI:


PubMed ID:





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